Cheema UEI-ENSTA, Dr. Muhammad Omer (2008) MPSoC Synthesis with Customized SIMD Instruction Set Extensions Thesis, ?? institution/paris11 ??.
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Abstract
An efficient system level design methodology for MPSoC synthesis should be able to exploit both coarse grained and fine grained parallelism inherent in the target application. Traditional MPSoC synthesis methodologies proposed so far emphasize on coarse grained (task level) parallelism exploitation where processor cores architecture is fixed before the start of multiprocessor design. On the other hand, extensible processor synthesis methodologies emphasize on fine grained (instruction level) parallelism ignoring the task level parallelism exploitation through multiprocessor design. We have observed that the problems of processor extension synthesis and general MPSoC synthesis are closely related and it is important to integrate both problems together to get optimal result. However, combining both problems complicates the synthesis even more because of large design spaces associated with these problems. In this thesis, we have proposed an MPSoC design methodology that combines the problem of traditional MPSoC synthesis with extensible processor synthesis to take benefit of both levels of parallelism.
Item Type: | Thesis (Thesis) |
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Uncontrolled Keywords: | SystemC |
Subjects: | Information and Communication Sciences and Technologies |
Divisions: | |
ID Code: | 4086 |
Deposited By: | Muhammad Omer Cheema |
Deposited On: | 06 nov. 2008 01:20 |
Dernière modification: | 05 juin 2013 09:13 |
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